Module Code: H6CA
Long Title Computer Architecture
Title Computer Architecture
Module Level: LEVEL 6
EQF Level: 5
EHEA Level: Short Cycle
Credits: 5
Module Coordinator: KEITH MAYCOCK
Module Author: David McCarthy
Departments: School of Computing
Specifications of the qualifications and experience required of staff

Master’s degree in computing or cognate discipline.  May have industry experience also.
Learning Outcomes
On successful completion of this module the learner will be able to:
# Learning Outcome Description
LO1 Summarise the historical evolution of Computer Architecture
LO2 Distinguish between different computer number systems
LO3 Identify and describe the relationship between each component of the computer system and how each individual component works
LO4 Explain the importance of using Boolean Algebra to logic design
LO5 Describe the use of registers when programming using assembly
LO6 Demonstrate practical assembly programming skills when solving fundamental programming problems
Dependencies
Module Recommendations

This is prior learning (or a practical skill) that is required before enrolment on this module. While the prior learning is expressed as named NCI module(s) it also allows for learning (in another module or modules) which is equivalent to the learning specified in the named module(s).
No recommendations listed
Co-requisite Modules
No Co-requisite modules listed
Entry requirements

See section 4.2 Entry procedures and criteria for the programme including procedures recognition of prior learning.
 

Module Content & Assessment

Indicative Content
Computer Architecture History
Turing Machines Vacuum Tubes The impact of the Transistor Integrated Circuits Very Large Scale Integration Ubiquitous Computing Quantum Computing
Number Systems
Binary Numbers Octal Numbers Hexadecimal Numbers Number System Conversions
Logic Design and Digital Circuits
Binary Logic and Gates. Introduction to Circuit Design. Introduction to Boolean Algebra. Boolean Algebra Identities. Algebraic Manipulation of Logic expressions.
Components
System Overview Data transfer and Bus Architecture Internal Memory System Components Peripherals Digital Components (for example Multiplexer, encoder, decoder, Adders)
Assembly Programming
Assemblers MIPS Registers Debugging strategies (single step control, using breakpoints) Input and Output Integer Addition and Subtraction Instructions Integer Multiplication, Division, and Arithmetic Shift Memory Access: Loading and Storing Registers Jump and Branch Instructions
Assessment Breakdown%
Coursework50.00%
End of Module Assessment50.00%

Assessments

Full Time

Coursework
Assessment Type: CA 1 % of total: 50
Assessment Date: n/a Outcome addressed: 1,2,3,4,5,6
Non-Marked: No
Assessment Description:
There are four continuous assessments throughout the semester each worth 12.5%.
End of Module Assessment
Assessment Type: Terminal Exam % of total: 50
Assessment Date: End-of-Semester Outcome addressed: 1,2,3,4,5,6
Non-Marked: No
Assessment Description:
End-of-Semester Final Examination
No Workplace Assessment
Reassessment Requirement
Repeat examination
Reassessment of this module will consist of a repeat examination. It is possible that there will also be a requirement to be reassessed in a coursework element.

NCIRL reserves the right to alter the nature and timings of assessment

 

Module Workload

Module Target Workload Hours 0 Hours
Workload: Full Time
Workload Type Workload Description Hours Frequency Average Weekly Learner Workload
Lecture No Description 24 Every Week 24.00
Lab No Description 12 Every Week 12.00
Independent Learning No Description 89 Every Week 89.00
Total Weekly Contact Hours 36.00
Workload: Part Time
Workload Type Workload Description Hours Frequency Average Weekly Learner Workload
Lecture No Description 24 Every Week 24.00
Lab No Description 12 Every Week 12.00
Independent Learning No Description 89 Every Week 89.00
Total Weekly Contact Hours 36.00
 

Module Resources

Recommended Book Resources
  • Patterson, D and Hennessy. (2016), Computer Organization and Design: The Hardware/Software Interface, 5th. Morgan Kaufmann, [ISBN: 01397801240].
  • Panayotis Papazoglou. (2018), The Ultimate Educational Guide to MIPS Assembly Programming, [ISBN: 9781727880878].
This module does not have any article/paper resources
This module does not have any other resources
Discussion Note: